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Every story we have published, newest first, across all three beats.

Generated imageSemiconductors

Token spend is becoming a line item in EDA project budgets, DAC roundtable finds

A closed-door DAC 2026 roundtable with Cadence, Synopsys, Siemens EDA, Keysight, and ChipAgents found token cost has moved from an afterthought to a formal budget concern in chip design projects.

10 Sept 2026Generated imageDesign & EDA

Cadence's Amol Borkar explains why AI voice at the edge demands a rethink of SoC architecture, not just faster processors

Semiconductor Engineering's interview with Cadence's Tensilica DSP lead lays out why NLP is reshaping audio SoC design - and why raw clock speed is the wrong lever to pull.

10 Sept 2026Generated imageDesign & EDA

French gendarmerie researchers show voltage glitching bypasses eMMC password locks on 3 of 10 commercial parts, with measurable evidence alteration

A paper from France's Institut de Recherche Criminelle quantifies both the success rate and the data-integrity cost of fault-assisted eMMC access in forensic investigations.

10 Sept 2026Generated imageSemiconductors

Cadence's Tensilica HiFi iQ DSP puts natural language processing directly on edge SoCs

Cadence's sixth-generation Tensilica HiFi iQ DSP delivers 2x compute and 8x AI performance over its predecessor, moving NLP and voice AI fully on-device for edge SoCs.

10 Sept 2026Generated imageSemiconductors

Keysight's forensic team argues hardware-layer testing is now a prerequisite for locked-device investigations

Keysight Device Security Testing published a framework in August 2026 explaining when and how forensic teams must move beyond software acquisition into side-channel analysis and fault injection.

10 Sept 2026Generated imageThe Silicon Brief

The Silicon Brief - 10 September 2026

Today: Samsung commits to High NA EUV DRAM by 2028 as TSMC, Intel, and ASML form a 12-inch photomask consortium; Kioxia rules out SK Hynix tie-up; Intel locks in fab spending; and South Korea's chip hub gets its funding anchor.

10 Sept 2026Generated imageDesign & EDA

NVIDIA details Vera CPU's Olympus core architecture at Hot Chips 2026, claiming 1.8x agentic AI speedup

NVIDIA presented the full microarchitecture of its 88-core Vera CPU at Hot Chips 2026 on 24 August, claiming up to 1.8x faster task completion on agentic workloads versus x86 competitors.

9 Sept 2026Generated imageDesign & EDA

Chips&Media's WAVE6331X FuSa video codec IP earns ISO 26262 ASIL-B certification from DNV

Chips&Media received ISO 26262 ASIL-B certification for its WAVE6331X FuSa video codec IP on 2 September 2026, covering H.264, H.265, AV1, and VP9 for automotive SoC integration.

9 Sept 2026Generated imageSemiconductors

SEMI publishes nine-point position paper urging EU to widen Chips Act 2.0 beyond fabs

SEMI has published a nine-recommendation position paper calling on EU co-legislators to extend Chips Act 2.0 incentives across the full semiconductor value chain, from design to advanced packaging.

9 Sept 2026Generated imageSemiconductors

Energy Vault completes land acquisition for its 125 MW / 1 GWh Stoney Creek BESS in New South Wales

Energy Vault has acquired full freehold ownership of the Stoney Creek BESS site in northern NSW, clearing a key development hurdle ahead of a Q1 2027 construction start.

9 Sept 2026Generated imageSemiconductors

Humanoid robot shipments surged nearly 300% in H1 2026, but battery life and compute architecture remain the hard limits

Global humanoid robot shipments exceeded 22,000 units in H1 2026, up nearly 300% year-on-year. The semiconductor industry is now the binding constraint on how fast the ramp can continue.

9 Sept 2026Generated imageThe Silicon Brief

The Silicon Brief - 9 September 2026

Today: Samsung maps a three-phase HBM roadmap toward zHBM compute-in-memory, SIA July sales hit $146.8 B for a 17th straight monthly record, SK hynix pushes hybrid bonding to HBM5, Micron flags a widening memory wall, and Huawei's FLINT paper proposes flash as an LLM inference tier.

9 Sept 2026Generated imageSemiconductors

SEMI and Silicon Catalyst sign global MOU to connect semiconductor startups with industry networks

SEMI and Silicon Catalyst signed a global MOU at SEMICON Taiwan 2026 on 2 September, linking the accelerator's 150+ portfolio companies with SEMI's 4,000-member global network.

8 Sept 2026Generated imageDesign & EDA

AI is compressing the design cycle - and exposing physical realization as the next bottleneck

As agentic AI shrinks the path to tape-out, the constraint in semiconductor development is migrating downstream - into packaging, multi-physics signoff, and physical realization.

8 Sept 2026Generated imageDesign & EDA

Synopsys hosts TetraMem and ANAFLASH at DAC 2026 to show compute-in-memory chips attacking the AI weight-movement bottleneck

At DAC 2026 on 28 July, Synopsys hosted TetraMem and ANAFLASH to show how non-volatile compute-in-memory chips sidestep the data-movement cost that limits AI at the edge.

8 Sept 2026Generated imageSemiconductors

Molex's MiniMix connector puts 15 A and 1 Gbps Ethernet into a 5.65 mm profile for humanoid robot joints

Molex unveiled MiniMix on 5 August 2026, a hybrid power-and-signal connector that routes 15 A and 1000BASE-T1 Ethernet through a 5.65 mm profile for humanoid robot joints.

8 Sept 2026Generated imageSemiconductors

Amphenol extends its H4 solar connector platform to 2000 V DC with the new H4 Plus P2KV

Amphenol Industrial Operations has added a 2000 V DC connector to its H4 Plus family, targeting utility-scale PV and solar-plus-storage systems moving beyond 1500 V architectures.

8 Sept 2026Generated imageDesign & EDA

SEMI sets SEMICON West 2026 program around the industry's $1 trillion revenue milestone

SEMI announced the full SEMICON West 2026 program on 27 August, placing the industry's $1 trillion revenue milestone and AI-driven chip design at the center of three days in San Francisco.

7 Sept 2026Generated imageDesign & EDA

Delmic co-founder Sander den Hoedt built a TU Delft spinoff into a three-product electron microscopy company over 15 years

SemiWiki's CEO interview with Sander den Hoedt traces how a 2010 TU Delft patent became Delmic's SECOM, FAST-EM, and METEOR product lines for nanoscale imaging.

7 Sept 2026Generated imageSemiconductors

Bürkert extends SideCONTROL positioner range to add digital communications to existing pneumatic valves

Bürkert's SideCONTROL electropneumatic positioners mount on existing pneumatic actuators to add IO-Link, industrial Ethernet, and onboard PID control without replacing installed valves.

7 Sept 2026Generated imageSemiconductors

binder extends its M12 portfolio with an angled PCB connector designed for tubular sensor housings

binder's new angled M12-A connector mounts flush with the PCB plane rather than stacking above it, targeting compact sensors and industrial automation devices built into narrow cylindrical housings.

7 Sept 2026Generated imageSemiconductors

YXY Electronics adds IP68 CAT6 coupler to its M20 connector line for permanent outdoor Ethernet runs

YXY Electronics' YPM20-CAT6CAT6-2 brings IP68 sealing, gold-plated contacts, and a -40 °C to +105 °C operating range to standard RJ45 Gigabit Ethernet field joints.

7 Sept 2026Generated imageDesign & EDA

Signaloid founder Phillip Stanley-Marbell steps down from Cambridge chair to run probabilistic computing startup full-time

SemiWiki's CEO interview with Phillip Stanley-Marbell traces his path from Bell Labs and Apple to founding Signaloid, a Cambridge spinout whose C0-ASIC targets 1000× performance-per-watt gains.

22 Aug 2026
Design & EDA
Design & EDA

TSMC's COUPE co-packaged optics platform enters production in the second half of 2026

TSMC's Compact Universal Photonic Engine moves from qualification to volume production in H2 2026, promising 2x power efficiency and 10x lower latency over pluggable optics.

22 Aug 2026Generated imageSemiconductors

Semiconductor Engineering frames energy efficiency as the defining constraint for AI computing through 2030

Data center electricity is set to nearly double to 945 TWh by 2030, making energy efficiency the central strategic challenge - and opportunity - for every company deploying AI at scale.

22 Aug 2026Generated imageSemiconductors

IBM joins two cryogenic modules in a step toward a 1,000-qubit system by 2027

IBM connected and cooled two modular cryogenic systems on 19 August 2026, reaching below 15 millikelvin - a hardware milestone on its path to the Quantum Starling system in 2029.

22 Aug 2026Generated imageSemiconductors

Engineering community survey finds nearly half expect quantum computing to remain more than five years from chip-design relevance

A community survey on quantum computing finds roughly 45% of engineers believe the technology is still more than five years from affecting their chip work, while curiosity about it runs high.

22 Aug 2026Generated imageThe Silicon Brief

The Silicon Brief - 22 August 2026

Today's digest: Broadcom eyes $60B in debt for an AI chip deal, Micron commits $10B to a Boise research lab, Wolfspeed's AI data center revenue more than doubles, Arista hits 12.8 Tb/s at Hot Interconnects, Kulicke & Soffa names a new CEO, and Washington directs federal agencies to prioritise semiconductor R&D.

22 Aug 2026Generated imageDesign & EDA

Agentrys claims its Studio platform lets chip design teams assemble a custom multi-agent flow in 30 minutes

Agentrys says its Studio platform can stand up a custom multi-agent chip design flow in about 30 minutes, with a live demonstration planned for Hot Chips 2026 on 23-25 August.

21 Aug 2026Generated imageDesign & EDA

Siemens EDA details Questa One's three-pillar AI update at DAC 2026

Siemens EDA briefed attendees at DAC 2026 on Questa One's latest AI-driven verification updates, covering faster engines, MCP-enabled inter-engine communication, and an Agentic Toolkit with five domain-scoped agents.

21 Aug 2026Generated imageSemiconductors

Lam Research's Semiverse Solutions shows feedforward control lifting wafer pass rates from 61% to 97% in digital twin simulation

Lam Research's Semiverse Solutions used SEMulator3D digital twin simulation to show feedforward etch control raising wafer pass rates from 60.82% to 96.77% and improving Cpk 2.5x.

21 Aug 2026Generated imageSemiconductors

Intel Foundry cuts carbon per wafer by up to 70% as AI demand pushes customers to scrutinise Scope 3

Intel's 2025-26 Corporate Responsibility Report shows a 70% carbon-per-wafer reduction and $999 million in green investment, directly lowering Scope 3 emissions for foundry customers.

21 Aug 2026Generated imageSemiconductors

India's fifth SEMICON India opens 17 September with Semicon 2.0 and three plants already in production

SEMICON India 2026 runs 17-19 September in New Delhi with 500+ exhibitors and a new six-pillar Semicon 2.0 programme, as three Sanand facilities reach commercial production.

21 Aug 2026Generated imageThe Silicon Brief

The Silicon Brief - 21 August 2026

Today's digest: TSMC confirms A16 mass production for Q4 2026, SIA names a new CEO, Samsung details SF2Z backside power for 2027, bond reliability emerges as a critical test bottleneck, and TSMC's Arizona second fab moves to equipment installation.

21 Aug 2026Generated imageDesign & EDA

Quadric schedules three conference appearances to demonstrate Chimera GPNPU between 23 August and 24 September 2026

Quadric will appear at HotChips, AI Infra Summit, and Embedded World North America between 23 August and 24 September 2026 to demonstrate its Chimera GPNPU processor IP.

20 Aug 2026Generated imageDesign & EDA

ESD Alliance schedules a Gen-AI for chip design and security webinar for 10 September 2026

The ESD Alliance's Savage on Security series returns on 10 September 2026, examining how multi-agent LLM systems will automate SoC design and security verification.

20 Aug 2026Generated imageSemiconductors

Nordson argues wafer-mapped sampling must replace static bond-test strategies as interconnects shrink to a few microns

Nordson's Semiconductor Engineering analysis shows why static bond-test sampling is failing advanced packaging, and how dynamic wafer mapping is taking its place.

20 Aug 2026Generated imageSemiconductors

NVIDIA, Google, and Microsoft push 800 VDC into AI data centers through OCP, targeting 2 MW per rack row by 2027

NVIDIA, Google, and Microsoft are formalising 800 VDC as the power standard for megawatt-scale AI racks, with more than 80 ecosystem companies already building to the OCP specification.

20 Aug 2026Generated imageSemiconductors

AI data centers are splitting inference across CPUs, GPUs, and RDUs to cut token cost

A Semiconductor Engineering roundtable finds that heterogeneous clusters - not faster GPUs alone - are the primary lever for reducing AI inference token cost in 2026.

20 Aug 2026Generated imageThe Silicon Brief

The Silicon Brief - 20 August 2026

Today's digest: Samsung locks its 1.4 nm node to 2029, Intel closes a $20 billion equity raise, NVIDIA turns compute into a Wall Street asset class, Micron opens a $250 million AI venture fund, and bond reliability emerges as the critical vulnerability in high-density semiconductor test.

20 Aug 2026Generated imageDesign & EDA

Applied Materials argues AI energy efficiency requires co-optimization from chip materials to system architecture

At the OCP APAC Summit on 11-12 August 2026, Applied Materials' Subi Kengeri warned that AI's energy bottleneck cannot be solved at any single layer of the stack.

19 Aug 2026Generated imageDesign & EDA

PDF Solutions redesigns Exensio around LLM agents and scalable analytics in its Aurora architecture

PDF Solutions has unveiled Exensio Aurora, a reimagined platform architecture combining scalable analytics, a semiconductor semantic knowledge graph, and on-premise LLM agents for manufacturing intelligence.

19 Aug 2026Generated imageSemiconductors

Coherent ships 300 mm SiC substrate samples to AI semiconductor partners

Coherent began sampling 300 mm high-thermal-conductivity SiC substrates to AI chip customers on 17 August 2026, targeting a 25% heat-spreading improvement over current solutions.

19 Aug 2026Generated imageSemiconductors

NVIDIA backs OpenAI's 8 IT-GW Ohio AI campus with a $105 billion guarantee and $1.5 billion equity stake

NVIDIA secured land, power and shell capacity at SB Energy's PORTS-Pike campus in Ohio for OpenAI, disclosing a $105 billion guarantee and a $1.5 billion equity investment on 17 August 2026.

19 Aug 2026Generated imageSemiconductors

Nordson details how bond testing is shifting from sampling to data-driven process control in advanced packaging

Nordson's Semiconductor Engineering analysis shows bond testing moving beyond spot-checks toward AI-driven, wafer-mapped sampling as interconnect dimensions shrink to a few microns.

19 Aug 2026Generated imageDesign & EDA

Rise Design Automation launches IPCreate and IPTransform platforms at DAC 2026, claiming one million gates per engineer per week

Rise Design Automation unveiled IPCreate and IPTransform at DAC 2026, adding an AI-powered spec-to-HLS-to-RTL flow that claims one million gates per engineer per week.

18 Aug 2026Generated imageDesign & EDA

Washington State and UW-Madison propose an LSTM-driven framework that cuts voltage droop EDP by 76x in 2.5D PIM chiplet systems

Researchers from Washington State University and UW-Madison published ReVolt in August 2026, an LSTM-based runtime framework that eliminates voltage droop violations in 2.5D PIM chiplet platforms while cutting energy-delay product by 76x.

18 Aug 2026Generated imageSemiconductors

Securus Monitoring brings GPS and remote alcohol testing to APPA's annual training institute in Chicago

Securus Monitoring is demonstrating BLUtag GPS and SoberTrack alcohol-testing devices at the APPA Annual Training Institute in Chicago, 16-19 August 2026, citing a 30% reduction in supervision failure.

18 Aug 2026Generated imageThe Silicon Brief

The Silicon Brief - 18 August 2026

Today's digest: Intel and ASML confirm High-NA EUV in volume production as TSMC and Samsung defer to 2030, SK Hynix locks in a $500B Nvidia partnership, Nokia acquires NXP's Chandler fab for InP, Aixtron's optoelectronics orders surge 81%, and bond integrity emerges as the hidden reliability bottleneck in high-density test.

18 Aug 2026Generated imageDesign & EDA

SemiWiki profiles Jerry Chen, who left Apple and Inphi to build an ultra-low-power edge AI chip startup in Taipei

SemiWiki's CEO interview with Jerry Chen traces his path from IC design at Intel and Apple to founding Upbeat Technology in 2021, where the UP201/UP301 RISC-V MCU and UPM01 MEMS sensor are now shipping.

17 Aug 2026